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24AA02/24LC02B
6.0
6.1
WRITE OPERATION
Byte Write
bits of the word address remain constant. If the master
should transmit more than 8 words prior to generating
the Stop condition, the address counter will roll over and
the previously received data will be overwritten. As with
Following the Start condition from the master, the
device code (4 bits), the block address (3 bits, “don’t
cares”) and the R/W bit which is a logic-low, is placed
the byte write operation, once the Stop condition is
received an internal write cycle will begin (Figure 6-2).
onto the bus by the master transmitter. This indicates to
the addressed slave receiver that a byte with a word
address will follow once it has generated an Acknowl-
edge bit during the ninth clock cycle. Therefore, the
next byte transmitted by the master is the word address
and will be written into the Address Pointer of the
24XX02. After receiving another Acknowledge signal
from the 24XX02, the master device will transmit the
data word to be written into the addressed memory
location. The 24XX02 acknowledges again and the
master generates a Stop condition. This initiates the
internal write cycle and, during this time, the 24XX02
will not generate Acknowledge signals (Figure 6-1).
Note:
Page write operations are limited to writing
bytes within a single physical page
regardless of the number of bytes
actually being written. Physical page
boundaries start at addresses that are
integer multiples of the page buffer size (or
‘page size’) and end at addresses that are
integer multiples of [page size – 1]. If a
page write command attempts to write
across a physical page boundary, the
result is that the data wraps around to the
beginning of the current page (overwriting
data previously stored there), instead of
being written to the next page, as might be
6.2
Page Write
expected. It is therefore necessary for the
application software to prevent page write
The write-control byte, word address and the first data
byte are transmitted to the 24XX02 in the same way as
in a byte write. However, instead of generating a Stop
operations that would attempt to cross a
page boundary.
condition, the master transmits up to 8 data bytes to the
6.3
Write Protection
24XX02, which are temporarily stored in the on-chip
page buffer and will be written into memory once the
master has transmitted a Stop condition. Upon receipt
of each word, the four lower-order Address Pointer bits
are internally incremented by ‘ 1 ’. The higher-order 7
The WP pin allows the user to write-protect the entire
array (00-FF) when the pin is tied to V CC . If tied to V SS ,
the write protection is disabled.
FIGURE 6-1:
BYTE WRITE
Bus Activity
Master
S
T
A
R
T
Control
Byte
Word
Address
Data
S
T
O
P
SDA Line
S
1
0
1
0
x
x x
0
P
A
A
A
Bus Activity
Block
Select
C
K
C
K
C
K
x = “don’t care”
FIGURE 6-2:
Bits
PAGE WRITE
Bus Activity
Master
S
T
A
R
T
Control
Byte
Word
Address (n)
Data (n)
Data (n + 1)
Data (n + 7)
S
T
O
P
SDA Line
S 10 10 xx x0
P
A
A
A
A
A
Bus Activity
x = don’t care
Block
Select
Bits
C
K
C
K
C
K
C
K
C
K
DS21709J-page 8
? 2009 Microchip Technology Inc.
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